mon - fri
9am - 7pm
Design Verification Services
Analog/Mixed Signal IC Design
Digital And Analog Layout
AMS Verification Engineer openings
ASIC Location: Bangalore Experience: 3 - 6 Years
Required Skills & Knowledge
Perform Sub-system and Chip level AMS simulations.
Perform full-chip level fast-spice simulations.
Experience with Cadence, Finesim, Questa ADMS, HSPICE or equivalent tools required.
Good understanding of analog macros such as Buck, LDO, ADC/DAC, PLL, Oscillator, Bandgap, Comparator, etc.
Should be able to review and understand chip level electrical specifications and requirements for analog macros.
BSEE minimum, MSEE preferred from an accredited engineering school.
3-6 years of experience working in an IC development environment.
Additional experience in circuit level debug is highly desirable.
Explore new flows and simulation tools and ideas for continuous improvement.
Experience with scripting languages like perl, skill, tcl or equivalent to automate flows is a plus.
Willingness to learn new skills and apply new technologies.
Strong communication skills and the ability to collaborate in a global team is essential.
Self-motivated, ability to work independently and excel in team environment.
To learn more about Siliciom Technologies, please contact us at
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